Choi Si-young, head of Samsung Electronics’ foundry enterprise unit, delivered a keynote speech emphasizing the corporate’s technique to shut the hole with Taiwan’s TSMC on the “Samsung Foundry Forum 2024.” (Photo offered by Samsung Electronics)

On July 9, Samsung Electronics hosted the “Samsung Foundry Forum 2024” at COEX in Samseong-dong, Seoul. During the occasion, Choi Si-young, head of Samsung Electronics’ foundry enterprise unit, delivered a keynote speech emphasizing the corporate’s technique to shut the hole with its important competitor, Taiwan’s TSMC. Leveraging its distinctive place as the one international complete semiconductor firm with foundry, reminiscence, and packaging capabilities, Samsung goals to distinguish its built-in AI resolution “Turn Key” service tailor-made to buyer wants.

“Currently, the power consumption of global data centers is about 2% of the total, but it is expected to double by 2026,” Choi acknowledged. He additional elaborated, “Therefore, high performance and low power consumption will be the most important factors. We will provide the most needed AI solutions to customers by integrating specialty solutions such as BCD (Bipolar-CMOS-DMOS) to enhance AI power efficiency and high-sensitivity sensor technology to improve the accuracy of edge devices.”

Song Tae-jung, crew chief of Samsung’s foundry enterprise unit, additionally emphasised the “integrated solution.” “Many companies individually offer competitive high-bandwidth memory technology and 2.5D packaging, but Samsung AI Solution is the only one providing an integrated AI solution,” he stated. “The highest value can be provided to customers when the technology is optimized and integrated.”

Samsung Electronics is enhancing its competitiveness in GAA (Gate-All-Around) processes and a pair of.5D packaging know-how to realize low-power, high-performance semiconductors. In 2022, Samsung efficiently utilized the GAA course of to 3nm for the primary time on the planet. Competitor TSMC can also be identified to use GAA from its 2nm course of. Samsung has revealed plans to start out 2nm mass manufacturing by the tip of subsequent yr and to enter the 1nm course of by 2027, as introduced on the foundry discussion board held within the United States.

In a major improvement, Samsung just lately secured an order for 2nm-based AI accelerator semiconductors from Japan’s Preferred Networks by means of collaboration with home DSP (Design Solution Partner) firm Gaonchips. Preferred Networks is a Japanese AI firm specializing in deep studying and creating superior know-how by vertically integrating the AI worth chain, together with generative AI-based fashions.

Samsung Electronics additionally introduced that it could actively help DSPs to assist Korea’s glorious fabless corporations quickly develop their affect within the HPC and AI fields. Samsung offers technical help to home prospects to make the most of the newest course of know-how and operates MPW (Multi Project Wafer) providers for prototype manufacturing. Customers utilizing MPW providers can scale back manufacturing prices and develop extra full semiconductors by inserting varied designs on a single wafer for testing. The complete variety of MPW providers by Samsung Electronics this yr is 32, from the 4nm course of to the BCD 130nm course of for high-performance energy semiconductors, a rise of about 10% in comparison with final yr. This will develop to 35 instances by 2025.

At the Samsung Foundry Forum, Samsung Electronics introduced course of roadmaps and repair statuses and offered networking alternatives amongst companions to debate methods to strengthen cooperation for innovation. In explicit, Telechips, ABOV, and Rebellion shared their profitable cooperation achievements, imaginative and prescient, and developments within the fabless trade by means of periods on the discussion board.

Additionally, on the SAFE Forum, Samsung Electronics and home and worldwide companions centered on introducing AI semiconductor design infrastructure, together with 2.5D/3D chiplet design know-how, IP portfolios, and methodologies for verifying and optimizing designs. Last month, Samsung held the primary workshop of the Multi-Die Integration Alliance on the Silicon Valley U.S. Foundry Forum occasion, emphasizing the excessive implementation potential of next-generation high-performance, high-bandwidth semiconductors utilizing superior course of know-how.

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